The present invention relates to a method for optimizing the planarizing length of a polishing pad used for polishing thin films. More particularly, the present invention relates to a method for optimizing the planarizing length of a polishing pad for use in chemical mechanical polishing/planarization of semiconductor wafers.
When raw silicon wafers are manufactured, they commonly have surface irregularities on the wafer surface as a result of the manufacturing process. Semiconductor wafers are made from these raw wafers, and are commonly constructed in layers, where active devices are created on a first level and interconnecting conductive lines are created on upper layers. Conductive vias are fabricated to connect up levels of the circuit. In one common process, after each layer of the circuit is fabricated, an oxide or metal layer is deposited. A masking, etching and deposition process allows the vias to pass from layer to layer. Each oxide layer can create or add unevenness to the wafer that must be smoothed out before generating the next circuit layer. However, the unevenness must be smoothed out without smoothing out the irregularities in the silicon, which are reproduced at the oxide surface. Smoothing out the irregularities on the wafer surface will result in the oxide layer pitting and the wafer being unusable.
Chemical mechanical planarization (CMP) techniques are used to planarize the oxide or metal layers. Available CMP systems, commonly called wafer polishers, often use a rotating wafer carrier head that brings the wafer into contact with a polishing pad rotating in the plane of the wafer surface to be planarized. A chemical polishing agent or slurry containing microabrasives is applied to the polishing pad to polish the wafer. The wafer carrier head then presses the wafer against the rotating polishing pad and is rotated to polish and planarize the wafer. The mechanical force for polishing is derived from the rotating table speed and the downward force on the wafer carrier head. The chemical slurry is constantly transferred under the wafer carrier head. Rotation of the wafer carrier head helps in the slurry delivery as well in averaging the polishing rates across the substrate surface.
Another technique for performing CMP to obtain a more uniform polishing rate is the use of a linear polisher. Instead of a rotating polishing pad, a polishing pad linearly moves across the wafer surface. The wafer is still rotated to average out the local variations. An example of a linear polisher is the TERES(trademark) polisher available from Lam Research Corporation of Fremont, Calif.
With either type of polisher (linear or rotary), the polishing pad is an important part of the CMP system. To be effective, the polishing pad should have a high planarizing capability. One factor that determines the planarizing capability of a polishing pad is the pad""s planarizing length. The planarizing length is the lateral distance over which the polishing pad planarizes the surface of the wafer. The planarizing length may be engineered to a large range of values. However, a desired, or optimal planarizing length is the lateral distance over which the polishing pad polishes the unevenness on the wafer surface without planarizing the wafer itself. If the planarizing length exceeds this distance, pitting will occur on the wafer surface.
One method of producing a polishing pad with high planarizing capabilities involves applying a fixed abrasive to the surface of the polishing pad. The fixed abrasive is a hard abrasive that is embedded into pyramid-shaped cones in the polishing surface. The cones have flat tops, and are joined at the base to form a continuous material. However, the hard abrasive material has a tendency to scratch wafers, and is also expensive.
A method for optimizing the planarizing length of a polishing pad is provided herein. According to a first aspect of the method, a substantially constant network of islands and trenches is formed into a first side of a polishing pad. The trenches are formed to a pre-determined distance apart. The polishing pad is fit to a chemical-mechanical polishing system. A surface layer of a semiconductor wafer is planarized with the first side of the polishing pad. Upon completion of the polishing process, the planarized wafer surface layer is observed. If the wafer surface layer is planarized to an amount outside of a set target polishing range, the distance between the trenches on the first side of the polishing pad is uniformly decreased. The above steps are repeated until the wafer surface layer is planarized to an amount within the set target polishing range.
According to another aspect of the method, a substantially constant network of islands and trenches is formed into a surface of a polishing pad. The trenches are formed to a pre-determined distance apart. The polishing pad is fit to a chemical-mechanical polishing system, and a surface layer of a semiconductor wafer is polished with the surface of the polishing pad. Upon completion of the polishing process, the planarized wafer surface layer is observed. If the wafer surface layer is planarized to an amount within a set target polishing range, the polishing pad is removed from the chemical-mechanical polishing system. A substantially constant network of islands and trenches is formed into a surface of a new polishing pad, with the distance between the trenches being uniformly increased. The above steps are repeated until the wafer surface layer is planarized to an amount outside of the set target polishing range.
The foregoing discussion of the preferred embodiments has been provided only by way of introduction. Nothing in this section should be taken as a limitation on the following claims, which define the scope of the invention.